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发明名称
VERFAHREN ZUM VERRINGERN DER ELEKTROSTATISCHEN ENTLADUNG (ESD) VON LEITERN AUF ISOLATOREN
摘要
申请公布号
AT492878(T)
申请公布日期
2011.01.15
申请号
AT20060786942T
申请日期
2006.07.11
申请人
JDS UNIPHASE CORPORATION
发明人
HYNES, JOHN;KAWAND, JOHN;O'BOYLE, LILY;SADASIVAN, SUNDAR;VINCITORE, LEONARDO;D'AMATO, SALVATORE
分类号
G11B5/80;G06K3/00;G06K19/06;G11B5/72;G11C7/02;G11C11/00;G11C13/00
主分类号
G11B5/80
代理机构
代理人
主权项
地址
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