COUNTER CONTROL SIGNAL GENERATION CIRCUIT AND REFRESH CIRCUIT

摘要

PURPOSE: A circuit for generating a counter controlling signal and a refresh circuit are provided to prevent the generation of refresh fail due to the pulse of a periodic signal by implementing a refresh operation with respect to memory cell arrays which are accessed to identical addresses. CONSTITUTION: A first pulse signal generator(10) generates a first pulse signal. A reverse delay part acquires a self-refresh signal and implements a reverse delay operation. A logical part obtains the output signal of the self-refresh signal and the reverse delay part and implements a logical operation. A second pulse signal generating part(11) generates a second pulse signal. A signal generating part(12) obtains the pulse signals and generates a counter controlling signal.