BUFFER CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: The buffer circuit of a semiconductor memory device is provided to suppress the generation of errors in a writing signal by adding a latch to the outputting terminal of a DQS buffer. CONSTITUTION: A DQ signal is inputted through a DQ pad(30). A DIN buffer(20) receives and buffers the DQ signal. A DQS signal is inputted through a DQS pad(35). A DQS buffer(25) receives and buffers the DQS signal. The buffered DQS signal is supplied to an align latch(10) as the controlling signal for the DQ signal. The DQ signal is synchronized with the DQS signal and aligned in the align latch.