| 摘要 |
A semiconductor device is provided with silicon pillars arranged in a matrix and formed substantially perpendicularly to a main surface of a substrate, bit lines provided above the silicon pillars, gate electrodes covering a side surface of each silicon pillars via gate insulation films, first and second diffusion layers provided at an upper part and a lower part of the silicon pillar, respectively, a reference potential wiring provided in common to the plural silicon pillars for supplying a reference potential to the first diffusion layers, and memory elements connected between the second diffusion layers and the bit lines. The gate electrodes covering the silicon pillars adjacent in a first direction crossing the bit line are in contact with each other, and gate electrodes covering the silicon pillars adjacent in a second direction parallel with the bit line are isolated from each other.
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