发明名称 PARALLEL VIDEO PROCESSING ARCHITECTURE
摘要 The video data is parallel processed allowing for extremely fast video processing or a greatly reduced clock requirement for the video processing circuit. In operation, each video channel reads from main memory. This allows each video channel to track the laser directly. The Parallel video processor receives non-columnar pixel data, such as rows. The videoprocessor may support printers of any width without significantly increasing the size of the system.
申请公布号 US2010290072(A1) 申请公布日期 2010.11.18
申请号 US20100845675 申请日期 2010.07.28
申请人 KEITHLEY DOUGLAS GENE 发明人 KEITHLEY DOUGLAS GENE
分类号 B41J5/30;G06K15/02;G02B26/10;G03G15/04;G03G15/043;G06F3/12;G06K15/12;G06T1/20;H04N1/21;H04N1/23;H04N5/262 主分类号 B41J5/30
代理机构 代理人
主权项
地址
您可能感兴趣的专利