THRESHOLD VOLTAGE ADJUSTMENT THROUGH GATE DIELECTRIC STACK MODIFICATION

摘要

Multiple types of gate stacks (100,..., 600) are formed on a doped semiconductor well. A high dielectric constant (high-k) gate dielectric (30L) is formed on the doped semiconductor well (22, 24). A metal gate layer (42L) is formed in one device area, while the high-k gate dielectric is exposed in other device areas (200, 400, 500, 600). Threshold voltage adjustment oxide layers having different thicknesses are formed in the other device areas. A conductive gate material layer (72L) is then formed over the threshold voltage adjustment oxide layers. One type of field effect transistors includes a gate dielectric including a high-k gate dielectric portion. Other types of field effect transistors include a gate dielectric including a high-k gate dielectric portion and a first threshold voltage adjustment oxide portions having different thicknesses. Field effect transistors having different threshold voltages are provided by employing different gate dielectric stacks and doped semiconductor wells having the same dopant concentration.