发明名称 |
BASE STRUCTURE FOR III-V SEMICONDUCTOR DEVICES ON GROUP IV SUBSTRATES AND METHOD OF FABRICATION THEREOF |
摘要 |
<p>The structure presented herein provides a base structure for semiconductor devices, in particular for III-V semiconductor devices or for a combination of III-V and Group IV semiconductor devices. The fabrication method for a base substrate comprises a buffer layer, a nucleation layer, a Group IV substrate and possibly a dopant layer. There are, in a general aspect, two growth steps: firstly the growth of a lattice-matched III-V material on a Group IV substrate, followed by secondly the growth of a lattice-mismatched III-V layer. The first layer, called the nucleation layer, is lattice-matched or closely lattice-matched to the Group IV substrate while the following layer, the buffer layer, deposited on top of the nucleation layer, is lattice-mismatched to the nucleation layer. The nucleation layer can further be used as a dopant source to the Group IV substrate, creating a p-n junction in the substrate through diffusion. Alternatively a separate dopant layer may be introduced.</p> |
申请公布号 |
WO2010118529(A1) |
申请公布日期 |
2010.10.21 |
申请号 |
WO2010CA00588 |
申请日期 |
2010.04.16 |
申请人 |
ARISE TECHNOLOGIES CORPORATION;CHEONG, DAN DAEWEON;KLEIMAN, RAFAEL NATHAN;PETER, MANUELA;KOMARNYCKY, NICHOLAS;ROBINSON, BRADLEY JOSEPH;PRESTON, JOHN STEWART |
发明人 |
CHEONG, DAN DAEWEON;KLEIMAN, RAFAEL NATHAN;PETER, MANUELA;KOMARNYCKY, NICHOLAS;ROBINSON, BRADLEY JOSEPH;PRESTON, JOHN STEWART |
分类号 |
H01L21/20;H01L27/142;H01L29/26;H01L31/0328;H01L31/10;H01S5/32 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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