发明名称 Signal splitter
摘要 A controllable-gain circuit (TI, Rt, TS1, . . . , TS4) provides a first and a second pair of complementary gain-controlled signals (Ip1, Ip3; Ip2, Ip4) in response to an input signal (RFI). In each pair, one gain-controlled signal (Ip1, Ip2) is the input signal amplified with a gain G comprised in a range between a minimum gain Gmin and a maximum gain Gmax. The other gain-controlled signal (Ip3, Ip4) is the input signal amplified with complementary gain Gmax-G. A fixed-gain output circuit (Rfg, Nfg) makes a weighed sum (Ip1*Rfg+Ip3*Rfg) of one and the other gain-controlled signal in the first pair of complementary gain-controlled signals. The respective weighing factors for one and the other gain-controlled signal are substantially similar (Rfg). A controllable-gain output circuit (Rlg, Rhg, Nlg, Nhg) makes a weighed sum (Ip2*Rlg+Ip4*(Rlg+Rhg)) of one and the other gaincontrolled signal in the second pair of complementary gain-controlled signals. The respective weighing factors for one and the other gain-controlled signal are substantially different (Rlg, Rlg+Rhg).
申请公布号 US7816991(B2) 申请公布日期 2010.10.19
申请号 US20050575489 申请日期 2005.09.08
申请人 NXP B.V. 发明人 KERVAON THIBAULT PHILIPPE PAUL;AMIOT SEBASTIEN
分类号 H03G3/30 主分类号 H03G3/30
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