| 摘要 |
A high voltage may be generated for programming memory cells in a memory array. A middle voltage may also be generated for reading memory cells in the memory array. Control logic and switches may be used to select between the high voltage and the middle voltage. A first oscillator generates clock signals at a high frequency for generating the voltages, and a low frequency oscillator may be used to generate pulses at a lower frequency than the first oscillator to allow the first oscillator to operate only during such pulses to conserve power during a stand-by mode of operation to maintain the middle or medium voltage.
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