Embedded chip package with chips stacked in an interconnecting laminate

摘要

An embedded chip package (ECP) (10) includes a plurality of re-distribution layers (14) joined together in a vertical direction to form a lamination stack, each re-distribution layer (14) having vias (28) formed therein. The embedded chip package (10) also includes a first chip (26) embedded in the lamination stack and a second chip (62) attached to the lamination stack and stacked in the vertical direction with respect to the first chip (26), each of the chips having a plurality of chip pads (30). The embedded chip package (10) further includes an input/output (I/O) system (86) positioned on an outer-most re-distribution layer (82) of the lamination stack and a plurality of metal interconnects (34) electrically coupled to the I/O system (86) to electrically connect the first and second chips to the I/O system (86). Each of the plurality of metal interconnects (34) extends through a respective via (28) to form a direct metallic connection with a metal interconnect (34) on a neighboring re-distribution layer (14) or a chip pad (30) on the first (26) or second (62) chip.