| 摘要 |
PROBLEM TO BE SOLVED: To enable shortening of time required for matching of storage conditions of storage circuits which two processors each have, when switching to a lock step mode from a free step mode. SOLUTION: A processor system 100 includes processors 1 and 2 which are configured switchable in operation modes between a lock step mode in which these two processors execute the same instruction stream and a free step mode in which these two processors execute different instruction streams. In addition, the system 100 has a signal line group 5 which is disposed between a storage circuit 11 in the processor 1 and a storage circuit 21 in the processor 2, and a selection circuit 24. The signal line group 5 and the selection circuit 24 selectively connect between the storage circuits 11 and 21 in a stop period of instruction stream execution by the processors 1 and 2 provided for switching from the free step mode to the lock step mode. COPYRIGHT: (C)2010,JPO&INPIT |
