发明名称 Pseudo differential output buffer, memory chip and memory system
摘要 An output buffer includes first and second input transistors, first and second output loads and a current source. The first and second input transistors have first current electrodes that are commonly coupled to each other and control electrodes that are respectively coupled to a first differential input signal and a second differential input signal. The first and second output loads are coupled between a first power supply voltage and the first and second input transistors, respectively, wherein an output terminal is coupled to a node where the first output load is coupled to the first input transistor. The current source is coupled between the first current electrodes of the first and second input transistors and a second power supply voltage, wherein the second output load has an impedance value substantially one half of an impedance value of the first output load. Therefore, a differential output signal may be outputted through a single output terminal.
申请公布号 US7791958(B2) 申请公布日期 2010.09.07
申请号 US20080243116 申请日期 2008.10.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHOI JUNG-HWAN
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
主权项
地址