发明名称 SYSTEM AND METHOD FOR WAFER TEST
摘要 PURPOSE: A system and a method for a wafer test are provided to reduce the capacity of a memory by forming a memory for storing cell information as many as redundant cell. CONSTITUTION: A pin electronics unit(110) compares a reference signal and a read signal. The pin electronics unit outputs cell information according to a comparison result. A recording unit(140) records the cell information and corresponding cell address in a memory for data storage. A transfer unit(160) transmits the information recorded in the memory to a computer for analyzing a redundancy cell. A counting unit(130) counts the number of cell information stored in the memory for the cell data storage. A controller(120) controls the recording unit to stop storing the cell information.
申请公布号 KR20100081092(A) 申请公布日期 2010.07.14
申请号 KR20090000371 申请日期 2009.01.05
申请人 IT&T 发明人 CHANG, KYUNG HUN;OH, SE KYUNG
分类号 H01L21/66 主分类号 H01L21/66
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