发明名称 RECONFIGURABLE MEMORY BLOCK REDUNDANCY TO REPAIR DEFECTIVE INPUT/OUTPUT LINES
摘要 An embodiment of the present invention is a technique to provide a reconfigurable repair circuit in a memory device. A table structure contains a plurality of entries, each entry having a defective address word and a redundant address word. The redundant address word corresponds to a redundant block and is generated in response to a memory access to a defective input/output (I/O) line in a memory block of the memory device. A decoding circuit decodes the redundant address word to select a redundant I/O line in the redundant block to replace the defective I/O line.
申请公布号 KR20100080851(A) 申请公布日期 2010.07.12
申请号 KR20107011759 申请日期 2006.09.26
申请人 INTEL CORP. 发明人 HSU POCHANG;DODGE RICHARD
分类号 G11C29/00;G11C29/18 主分类号 G11C29/00
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