发明名称 METHOD FOR MODELING OF MOSFET MISMATCH THAT CONSIDER VARIATION OF GATE WIDTH AND GATE LENGTH
摘要 <p>PURPOSE: A MOSFET mismatch modeling method is provided to realize the accurate simulate during design by offering MOSFET mismatch modeling method which considers the process variation per width and length of an actual gate. CONSTITUTION: The gate width and gate length are measured. The modification model including width effect, and the gate width in consideration of the length effect and large size effect and the gate length is instituted. The modification model and the system which includes the gate width and the length by using extracted variables are simulated.</p>
申请公布号 KR20100078539(A) 申请公布日期 2010.07.08
申请号 KR20080136824 申请日期 2008.12.30
申请人 DONGBU HITEK CO., LTD. 发明人 CHOI, JUNG HYUN;KIM, JIN SOO
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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