发明名称 BINARY SELF-SYNCHRONOUS COUNTER WITH PRESET
摘要 FIELD: physics, computer engineering. ^ SUBSTANCE: invention can be used in designing self-synchronous flip-flops, register and computer devices and digital information processing systems. The binary self-synchronous counter has n single-type bits, circuits for bitwise indication of readiness of inputs for initial setup and the end of preset, the outputs of which are combined on hysteresis flip flops which form the signal for the end of preset in the counter. ^ EFFECT: provision for self-synchronous preset of a counter in a given state. ^ 3 cl, 5 dwg
申请公布号 RU2392735(C2) 申请公布日期 2010.06.20
申请号 RU20080121461 申请日期 2008.05.29
申请人 INSTITUT PROBLEM INFORMATIKI ROSSIJSKOJ AKADEMII NAUK (IPI RAN) 发明人 STEPCHENKOV JURIJ AFANAS'EVICH;PLEKHANOV LEONID PETROVICH;D'JACHENKO JURIJ GEORGIEVICH
分类号 H03K23/00 主分类号 H03K23/00
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