PATTERN LAYOUT DESIGNING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND COMPUTER PROGRAM PRODUCT

摘要

A graph is created in which mask patterns adjacent to one another at a distance in which desired printing resolution cannot be obtained in a lithography process among mask patterns generated based on a pattern layout design drawing are set as nodes connected to one another by edges. An odd number loop formed by an odd number of nodes is selected from closed loops. When the selected odd number loop is not isolated, based on whether a closed loop group in which a plurality of closed loops including the odd number loop are connected includes an even number loop formed by an even number of nodes, rearrangement target nodes are selected from the odd number loop included in the closed loop group according to different selection references. The layout of patterns described in the pattern layout design drawing is rearranged corresponding to the selected rearrangement target nodes.