发明名称 |
HARMONIC REJECTION MIXER UNIT AND METHOD FOR PERFORMING A HARMONIC REJECTION MIXING |
摘要 |
A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T3a, T3b; T4a, T4b) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS1-GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS1-GS4) from a local oscillator signal (LO). The transistor control signals (GS3, GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) are generated with a duty cycle of <50% and are generated such that the shape of the multiplication signal ELO) is achieved by a constructive summation of the output signals from the transistor units (T3a, T3b; T4a, T4b). The transistor control signals (GS1-GS4) are generated such that only a summation of output signals from the transistor units with the same sign or with zero is performed. |
申请公布号 |
EP2191566(A2) |
申请公布日期 |
2010.06.02 |
申请号 |
EP20080789491 |
申请日期 |
2008.07.30 |
申请人 |
NXP B.V. |
发明人 |
VAN SINDEREN, JAN;AMIOT, SEBASTIEN;HESEN, LEONARDUS, H., M.;BREKELMANS, JOHANNES, H., A. |
分类号 |
H03D7/14;H03D7/16;H03D7/18 |
主分类号 |
H03D7/14 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|