发明名称 Gain adjuster
摘要 A circuit for multiplying a digital signal by a variable gain, controlled in dependence on a digital gain control value. The circuit comprises: a multiplier input for receiving the digital signal; a multiplier output for outputting the digital signal multiplied by the gain; a plurality of multiplier stages each arranged to multiply by a respective predetermined multiplication factor; and switching circuitry arranged so as to apply selected ones of the multiplier stages in a multiplication path between the input and output, in dependence on the digital gain control value. The multiplication factors are arranged such that binary steps in the digital gain control value result in logarithmic steps in said gain.
申请公布号 GB201005764(D0) 申请公布日期 2010.05.26
申请号 GB20100005764 申请日期 2010.04.07
申请人 ICERA INC 发明人
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