发明名称 System and method for a universal data write unit in a 3-D graphics pipeline including generic cache memories
摘要 A system and method for a data write unit in a 3-D graphics pipeline including generic cache memories. Specifically, in one embodiment a data write unit includes a first memory, a plurality of cache memories and a data write circuit. The first memory receives a pixel packet associated with a pixel. The pixel packet includes data related to surface characteristics of the pixel. The plurality of cache memories is coupled to the first memory for storing pixel information associated with a plurality of surface characteristics of a plurality of pixels. Each of the plurality of cache memories is programmably associated with a designated surface characteristic. The data write circuit is coupled to the first a memory and the plurality of cache memories. The data write circuit is operable under program control to obtain designated portions of the pixel packet for storage into the plurality of cache memories.
申请公布号 US7724263(B2) 申请公布日期 2010.05.25
申请号 US20040846774 申请日期 2004.05.14
申请人 NVIDIA CORPORATION 发明人 HUTCHINS EDWARD A.;KIM PAUL;ANGELL BRIAN K.
分类号 G09G5/36;G06F12/08;G06F13/00;G06F13/14;G09G5/399 主分类号 G09G5/36
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