发明名称 POLISHING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a polishing method that polishes both an interlayer dielectric principally comprising silicon oxide and a low-k film at high speed, and further reduces a polishing flaw. <P>SOLUTION: In the polishing method of a substrate consisting of an interlayer dielectric having recesses and protrusions on the surface, a barrier layer which covers the interlayer dielectric, and a conductive material layer which fills the recesses and covers the barrier layer, a first chemical mechanical processing step of polishing the conductive material layer to expose the barrier layer at the protrusions is followed by a second chemical mechanical polishing step of polishing the barrier layer, the conductive material layer in the recesses and the interlayer dielectric by moving a turn table and the substrate relatively while supplying CMP solution while the substrate is pressed onto a soft type pad having shore hardness (D scale) of 40 or more, and polishing the conductive material layer and the interlayer dielectric by moving the turn table and the substrate relatively while supplying CMP solution having the same composition as that of the CMP solution described above while the substrate is pressed onto a hard type pad having shore hardness (D scale) of <40. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010108985(A) 申请公布日期 2010.05.13
申请号 JP20080276716 申请日期 2008.10.28
申请人 HITACHI CHEM CO LTD 发明人 SHINODA TAKASHI
分类号 H01L21/304;B24B37/00;C09K3/14;H01L21/3205;H01L21/321;H01L21/768 主分类号 H01L21/304
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