发明名称 METHOD FOR CONTROLLING THE LOOP DELAY IN A SIGMA-DELTA MODULATOR, AND SIGMA-DELTA MODULATOR IMPLEMENTING SAID METHOD
摘要 <p>The invention relates to a method for controlling the loop delay in a sigma-delta modulator that consists of a loop comprising at least one integrator (400, 500), an analog-to-digital converter ADC (401, 501), a digital-to-analog converter DAC (402, 502) and an adder-subtractor (403, 503), characterised in that at least one phase control programmable digital control (f1, f2) representing an offset is applied to one of the clock signals of the loop converters in order to adjust the relative phase between the clock signal h1(t) of the ADC converter (401, 501) and the clock signal h2(t) of the DAC converter (402, 502). The invention also relates to a sigma-delta modulator for implementing said method.</p>
申请公布号 WO2010049504(A1) 申请公布日期 2010.05.06
申请号 WO2009EP64321 申请日期 2009.10.29
申请人 THALES;HODE, JEAN-MICHEL 发明人 HODE, JEAN-MICHEL
分类号 H03M3/02;H03M1/06;H03M1/10 主分类号 H03M3/02
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