发明名称 Averaging circuit apparatus, error signal generation system and method of averaging an error signal
摘要 An averaging circuit apparatus comprises a rectifier having an input for receiving a high-speed error signal having, for example, a data rate of 10 Gbps. An integrator is coupled to the rectifier and has an error output for providing an averaged representation of the error signal. The averaged representation of the error signal is supplied to a Digital Signal Processor in a channel equalizer loop for equalizing a fiber-optic channel. The Digital Signal Processor executes an algorithm that sets tap coefficients of an analogue filter in response to the averaged representation of the error signal.
申请公布号 US7710186(B2) 申请公布日期 2010.05.04
申请号 US20060455377 申请日期 2006.06.19
申请人 AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. 发明人 ABOULHOUDA SAMIR;SEIFU FESSEHA TESSERA
分类号 G06F7/42;H04L25/03 主分类号 G06F7/42
代理机构 代理人
主权项
地址
您可能感兴趣的专利