发明名称 |
CORELESS SUBSTRATE HAVING FILLED VIA PAD AND A FABRICATING METHOD THE SAME |
摘要 |
PURPOSE: A coreless substrate and a manufacturing method thereof are provided to reduce a process time by using a carrier with a releasing layer and removing an etching process. CONSTITUTION: A build-up layer(130) comprises a build up circuit layer which has a build up insulating layer and a build up via. A first insulation layer(120) and a second insulation layer(140) are formed in the outermost layer of both sides of the build-up layer. A first field via-pad(152a) and a second field via-pad(152b) are respectively formed in the first insulation layer and the second insulation layer. The first field via-pad and the second field via-pad are buried to the same height as the surface of the second insulation layer and the first insulation layer. The first field via-pad and the second field via-pad are faced with each other.
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申请公布号 |
KR20100043547(A) |
申请公布日期 |
2010.04.29 |
申请号 |
KR20080102626 |
申请日期 |
2008.10.20 |
申请人 |
SAMSUNG ELECTRO-MECHANICS CO., LTD. |
发明人 |
LEE, SEOK KYU;JUNG, SOON OH;HONG, JONG KUK;CHO, SOON JIN |
分类号 |
H05K3/46;H05K1/02;H05K3/40 |
主分类号 |
H05K3/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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