| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a static semiconductor memory device capable of obtaining a large write margin. Ž<P>SOLUTION: In the static semiconductor device, an internal write signal WLi is set to an H level for a predetermined period of time upon setting of a read/write control signal/WE to an L level. When the internal write signal WLi is at the L level, a power supply voltage is supplied to a memory cell. When the internal write signal WLi is at the H level, a voltage VCC-VTH obtained by reducing the power supply voltage VCC is supplied to the memory cell. The predetermined period of time when the internal write signal WLi is at the H level is shorter than a period of time when the read/write control signal is at the L level. Thus, a large static noise margin is maintained during a non write operation. A large write margin is obtained during a write operation. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
|
