Parallel analog-to-digital converter, has input contacts connected with emitter terminals of respective transistors, and comparator circuit formed to impart negative and positive control current to respective emitter terminals

摘要

The converter has input contacts (DN, DP) connected with emitter terminals (405.1, 407.1) of transistors (405, 407) e.g. bipolar transistors or FETs, respectively. A temporally constant bias (Vbias) lies at base terminals (405.2, 407.2) of the respective transistors. A comparator circuit (401) is formed to impart negative and positive control current to the emitter terminals of the respective transistors. The emitter terminals are connected with a ground terminal by constant current sources (409, 411).