发明名称 Datapipe CPU register array and methods of use
摘要 A system for data processing comprises a host circuit (104) and an integrated circuit (102), the host circuit (104) being external to the integrated circuit (102). The integrated circuit (102) includes a plurality of programming elements (300), each element (300) including a host interface (606) for receiving data and a first control signal from the host circuit (104), a control interface (604) for receiving a second control signal. Each element (300) includes a crosspoint switch (318), and a register array (628) for receiving and storing data from the crosspoint switch (318) according to the first and second control signals, for receiving and storing data from the host interface (606) according to the first and second control signals, and for communicating stored data to the crosspoint switch (318) according to the first and second control signals.
申请公布号 US7685332(B2) 申请公布日期 2010.03.23
申请号 US20060613268 申请日期 2006.12.20
申请人 L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P. 发明人 YANCEY JERRY WILLIAM;KUO YEA ZONG
分类号 G06F3/00;G06F5/00 主分类号 G06F3/00
代理机构 代理人
主权项
地址