| 摘要 |
There is provided an information processing apparatus in which a CPU and an audio processing unit are coupled by a bus. The audio processing unit includes a ring buffer that temporarily retains audio data, and performs an input/output process of the audio data. An interrupt signal generator generates a buffer empty signal, when the audio data is output from a buffer in the ring buffer and the buffer is empty, decimates the buffer empty signal in accordance with a sampling frequency of audio, and then feeds the interrupt signal that survives the decimation to the CPU. The CPU, upon receiving the buffer empty signal, issues a DMA transfer instruction for writing the audio data into the empty buffer in the ring buffer.
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