发明名称 SEMICONDUCTOR DEVICE AND INFORMATION PROCESSING SYSTEM
摘要 <p>Provided is a user-friendly information processing system which is capable of maintaining latency constant and ensuring the expandability of a memory capacity at high speed and at low cost.  The information processing system including an information processing device, a volatile memory, and a nonvolatile memory is configured.  The information processing device, the volatile memory, and the nonvolatile memory are connected in series to reduce the number of connection signals, thereby promoting speeding-up while maintaining the expandability of a memory capacity.  The information processing device measures latency and performs a correction operation on the latency, thereby maintaining latency constant.  The information processing device performs an error correction to improve the reliability when transferring data in the nonvolatile memory to the volatile memory.  The information processing system composed of the plurality of chips is configured as an information processing system/module in which the respective chips are arranged and stacked one upon another, and are connected by means of a ball grid array (BGA) and/or a chip-to-chip wiring technique.</p>
申请公布号 WO2010029830(A1) 申请公布日期 2010.03.18
申请号 WO2009JP64146 申请日期 2009.08.10
申请人 HITACHI, LTD.;MIURA, SEIJI 发明人 MIURA, SEIJI
分类号 G06F12/06;G06F12/00;G06F13/16 主分类号 G06F12/06
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