| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor test circuit that can be verified through a small number of working hours. Ž<P>SOLUTION: The semiconductor test circuit 1 has a terminal P1 for inputting a common test pattern to a semiconductor device 20 and a test device 10. In the semiconductor device 20 and the test device 10 which have a circuit block arrangement region to which mutually common addresses are allocated, a circuit block is disposed only at one circuit block arrangement region designated by the same address. Thereby verification can be performed as if they form one device, and verification can be made with a small number of working hours. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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