发明名称 Write and read assist circuit for SRAM with power recycling
摘要 A memory circuit for reading and writing data into a SRAM memory array using charge recycling is presented. The write and read circuit includes a cell voltage level switch, a recycle charge storage, a precharge switch, a write enable switch, and column decoder. The cell voltage level switch is connected to a low power supply and a high power supply and has two states of operation: a write operation state and a read operation state. For each state of operation, the voltage level switch selectively provides a power supply if a column has been selected or if the operation is a read or write. The recycle charge storage stores excess charge from SRAM cells after a read operation or after a write operation in unselected columns. After the read or write operation, the recycle charge storage discharges excess charge to the bitlines during bitline precharging.
申请公布号 US7679948(B2) 申请公布日期 2010.03.16
申请号 US20080133808 申请日期 2008.06.05
申请人 SUN MICROSYSTEMS, INC. 发明人 PARK HEECHOUL;KIM SONG;KWONG LANCELOT
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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