发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To facilitate planarization by stabilizing a capacity of a DRAM and reducing the difference in height between a memory cell part and a peripheral circuit part. Ž<P>SOLUTION: A first contact plug is buried in a first insulating film on a memory cell transistor, and second and third insulating films different in etching characteristics are formed, and a contact window piercing the second and third insulating layers is formed, and a cylinder type storage electrode is formed, and the third insulating film is removed with the second insulating film as an etching stopper, and a capacitor insulating film and a conductive film are formed and are patterned to form a counter electrode, and the second insulating film also is removed in accordance with the counter electrode to form a memory cell, and a conductive film and an insulating film are formed on the first insulating film in a peripheral edge area, and a second contact plug is buried in them. An end part of the second insulating film is not brought into contact with the second contact plug. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010056578(A) 申请公布日期 2010.03.11
申请号 JP20090277893 申请日期 2009.12.07
申请人 FUJITSU MICROELECTRONICS LTD 发明人 IKEMASU SHINICHIRO;OKAWA SHIGEMI
分类号 H01L21/8242;H01L21/28;H01L21/3205;H01L21/768;H01L23/52;H01L27/108 主分类号 H01L21/8242
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