发明名称 CIRCUIT DESIGN DEVICE AND CIRCUIT DESIGN METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a circuit design device and circuit design method of a semiconductor integrated circuit for reducing a power. <P>SOLUTION: The circuit design device includes: a simulation means for performing simulation on description data describing behavior of hardware in a test environment for power consumption analysis; a power reduction effect calculation means for calculating power reduction effects achieved when analyzing waveform data obtained by simulation and replacing a cell with a low power cell; and a low power cell replacement means for replacing a cell which can be power-reduced by being replace with a low power cell, with the low power cell. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010055206(A) 申请公布日期 2010.03.11
申请号 JP20080217154 申请日期 2008.08.26
申请人 FUJITSU LTD 发明人 FUJITA TAKASHI;SASAKI TAKAYUKI;NIITSUMA JUNICHI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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