发明名称 NOVEL HIGH-K METAL GATE CMOS PATTERNING METHOD
摘要 The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a first metal layer over the capping layer, the first metal layer having a first work function, forming a mask layer over the first metal layer in the first active region, removing the first metal layer and at least a portion of the capping layer in the second active region using the mask layer, and forming a second metal layer over the partially removed capping layer in the second active region, the second metal layer having a second work function.
申请公布号 US2010048013(A1) 申请公布日期 2010.02.25
申请号 US20090536629 申请日期 2009.08.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 THEI KONG-BENG;CHUANG HARRY;CHEN RYAN CHIA-JEN;LAI SU-CHEN;MOR YI-SHIEN;CHEN YI-HSING;SHEN GARY;LIN Y. C.
分类号 H01L21/28 主分类号 H01L21/28
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