发明名称 BIAS VOLTAGE GENERATION CIRCUIT AND DRIVER INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To easily generate a corrected variable bias voltage by a comparatively simple circuit configuration. Ž<P>SOLUTION: A bias voltage generation circuit 50 comprises: a register 51 which holds a variable n-bit register value RV set externally; a nonvolatile memory 52 for storing n-bit correction values CV0 to CV7 for correcting the data value RV; A computing circuit 60 which computes the n-bit register value RV and the n-bit correction values CV0 to CV7 and outputs n-bit arithmetic operation results S0 to S7; a resistance voltage division circuit 70 divides reference voltage VRS into 2<SP>n</SP>voltages and outputs 2<SP>n</SP>levels of divided voltages; and a selection circuit 80 which selects one level of a divided voltage DV from the 2<SP>n</SP>levels of divided voltages DV0 to DV255 respectively on the basis of the n-bit computing results S0 to S7, and outputs a bias voltage BV having a variation over 2<SP>n</SP>levels. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010044686(A) 申请公布日期 2010.02.25
申请号 JP20080209660 申请日期 2008.08.18
申请人 OKI SEMICONDUCTOR CO LTD;OKI MICRO DESIGN CO LTD 发明人 TOMITA SHUNICHI
分类号 G05F1/10;G02F1/133;G09G3/20;G09G3/36;H01L21/822;H01L27/04 主分类号 G05F1/10
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