发明名称 Method and system for efficiently recording processor events in host bus adapters
摘要 A host bus adapter (“HBA”) is provided with a programmable trace logic that can be enabled or disabled by firmware running on the HBA and if enabled can receive trace information from at least one processor, which is stored in a local memory buffer controlled by a local memory interface. A receive and transmit path processor data is traced and stored in the local memory buffer. The trace logic includes an arbitration module that receives trace data from plural sources and the trace data is stored in a first in first out based buffer before being sent to a direct memory access arbiter module and then to an external memory. Trace data as stored in the external memory includes a trace data source identity value, and a time stamp value indicating when data was collected.
申请公布号 US7669190(B2) 申请公布日期 2010.02.23
申请号 US20040847756 申请日期 2004.05.18
申请人 QLOGIC, CORPORATION 发明人 KONDA DHARMA R.;HUEY JAMES D.;CAMPBELL FRANK W.;DOAN TUAN A.
分类号 G06F9/44;G06F11/00 主分类号 G06F9/44
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