发明名称 Semiconductor integrated circuit device and a manufacturing method for the same
摘要 Provided is a manufacturing method for a power management semiconductor device or an analog semiconductor device both including a CMOS. According to the method, a substance having high thermal conductivity is additionally provided above a semiconductor region constituting a low impurity concentration drain region so as to expand the drain region, which contributes to a promotion of thermal conductivity (or thermal emission) in the drain region during a surge input and leads to suppression of local temperature increase, to thereby prevent thermal destruction. Therefore, it is possible to manufacture a power management semiconductor device or an analog semiconductor device with the extended possibility of transistor design.
申请公布号 US2010032676(A1) 申请公布日期 2010.02.11
申请号 US20090462423 申请日期 2009.08.04
申请人 SAITON NATO;KITAJIMA YUICHIRO 发明人 SAITON NATO;KITAJIMA YUICHIRO
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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