Selection of cells from a multiple threshold voltage cell library for optimized mapping to a multi-Vt circuit

摘要

A method is provided to select circuit cells for use in optimization of an integrated circuit design from among a plurality of circuit cells within a cell library, the method comprising: obtaining a value for each cell of the plurality that is indicative of both the cell's power dissipation and the cell's rate of output voltage change; ordering the cells of the plurality based upon the values; identifying a difference between values of cells that are proximate each other within the ordering of the cells that meets a threshold; and designating a cut point within the ordering of the cells based upon the identified difference.