发明名称 Semiconductor memory device including a stacked gate having a charge storage layer and a control gate, and method of manufacturing the same
摘要 A semiconductor memory device includes a source region, a drain region, a channel region, a charge storage layer, and a control gate electrode. The source region and drain region are formed separately from each other in a surface of a semiconductor substrate. The channel region is formed in the semiconductor substrate and located between the source region and the drain region. The charge storage layer is formed on the channel region with a first insulating film interposed therebetween. The control gate electrode is formed on the charge storage layer with a second insulating film interposed therebetween. The control gate has an upper corner portion rounded with a radius of curvature of 5 nm or more.
申请公布号 US7652319(B2) 申请公布日期 2010.01.26
申请号 US20070940838 申请日期 2007.11.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TSURUMI DAISUKE;NOGUCHI MITSUHIRO;KOYAMA HARUHIKO
分类号 H01L29/94 主分类号 H01L29/94
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