发明名称 Configurable random-access-memory circuitry
摘要 Integrated circuits such as programmable logic device integrated circuits are provided that have memory arrays that may be configured for true dual port operation or simple dual port operation. The memory arrays include memory cells arranged in rows and columns and associated row address lines and data lines. Sense amplifiers and write drivers are used for reading and writing data. Precharge drivers are used to precharge the data lines prior to read operations. Configurable multiplexer circuitry in the array has read paths through which data is provided to the sense amplifiers from the memory cells. The multiplexer circuitry has write paths through which data from the write drivers is written into the memory cells. The read paths and the write paths contain no more than a single pass gate each. Each precharge driver may be connected to a respective one of the data lines with no intervening pass gates.
申请公布号 US7639557(B1) 申请公布日期 2009.12.29
申请号 US20070714327 申请日期 2007.03.05
申请人 ALTERA CORPORATION 发明人 CHOU HAO-YUAN HOWARD;YU HAIMING
分类号 G11C8/00 主分类号 G11C8/00
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