| 发明名称 |
CLOCK SIGNAL AMPLIFIER CIRCUIT |
| 摘要 |
<p>A clock signal amplifier circuit comprises an inverter (11), a coupling capacitance (13) connected to the input of the inverter, two resistors (15) which are connected in series between a power supply potential and a ground potential and the connection point of which is connected to the input of the inverter, a feedback resistor (12) provided between the input and the output of the inverter, and two switches (14) which are provided in any two of the supply path of the power supply potential to the inverter, the supply path of the ground potential to the inverter, and the feedback path of the inverter via the feedback resistor and which perform the same switching operation to each other according to a control signal.</p> |
| 申请公布号 |
WO2009147770(A1) |
申请公布日期 |
2009.12.10 |
| 申请号 |
WO2009JP01092 |
申请日期 |
2009.03.11 |
| 申请人 |
PANASONIC CORPORATION;KINOSHITA, MASAYOSHI;SOGAWA, KAZUAKI;YAMADA, YUJI |
发明人 |
KINOSHITA, MASAYOSHI;SOGAWA, KAZUAKI;YAMADA, YUJI |
| 分类号 |
H03K5/003;G06F1/06;H03F1/02;H03F1/34;H03K5/00;H03K17/00;H03K17/687 |
主分类号 |
H03K5/003 |
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