| 摘要 |
PURPOSE: A method of manufacturing semiconductor memory apparatus and semiconductor memory apparatus manufactured thereby are provided to reduce increase of the resistance generated by alignment error of the mask pattern. CONSTITUTION: The plug region determines the storage node plug mask and bit line plug mask. The insulating layer is formed on the structure forming the gate pattern of the cell transistor and includes the gate pattern. The hard mask film is formed on the insulating layer. The hard mask film is etched through the lithographically processing using the storage node plug mask. The hard mask film is etched through the lithographically processing using the bit line plug mask. The insulating layer is etched by using the hard mask film.
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