发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a technique for increasing a rewriting current without increasing a power supply voltage and also reducing location dependency inside a memory array of a resistive state after the rewriting, in a resistance change type memory in which the resistance values of memory cells are changed between "1" and "0" of logical values. <P>SOLUTION: In the resistance change type memory, bit lines formed into a layered structure, and bit line selection switches BLSW for connecting to global bit lines GBL are arranged at both ends of local bit line LBL, and a control method of the bit line selection switches BLSW is changed over according to the writing time or reading time, thereby array configurations optimum for each of them are obtained. More specifically, at the writing time and reading time, two current paths are prepared in parallel by simultaneously turning ON the bit line selection switches BLSW. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009271985(A) 申请公布日期 2009.11.19
申请号 JP20080120466 申请日期 2008.05.02
申请人 HITACHI LTD 发明人 ONO KAZUO;TAKEMURA RIICHIRO;SEKIGUCHI TOMONORI
分类号 G11C13/00;G11C11/15 主分类号 G11C13/00
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