| 摘要 |
A method for making a high voltage insulated gate field-effect transistor with one or more JFET conduction channels comprises successively implanting a dopant of a first conductivity type in a first layer (10,60,110) of a second conductivity type so as to form a first plurality of buried layers (15,65,115) disposed at a different vertical depths. A second layer (70,120) is epitaxially formed on the first layer (60,110) and the implant process repeated to form a second plurality of buried layers (75,125) in stacked parallel relationship to the first plurality of buried layers. Alternatively, the first layer (10) is flipped over and bonded to a substrate, and the implant process is repeated to form a second plurality of buried layers (15e-15h) in stacked parallel relationship to the first plurality of buried layers (15a-15d). |
