发明名称 Layout for capacitor pair with high capacitance matching
摘要 An integrated circuit device includes a capacitor array, which includes unit capacitors arranged in rows and columns, wherein each unit capacitor is formed of two electrically insulated capacitor plates. The unit capacitors include at least one first unit capacitor in each row and in each column of the capacitor array; the at least one first unit capacitor being interconnected, wherein each row of the capacitor array comprises a same number of the at least one first unit capacitors as other rows and columns have, and wherein each column of the capacitor array comprises a same number of the at least one first unit capacitors as other rows and columns have. The unit capacitors further include at least one second unit capacitor in each row and in each column of the capacitor array, wherein the at least one second unit is interconnected and evenly distributed throughout the array.
申请公布号 US7612984(B2) 申请公布日期 2009.11.03
申请号 US20060591643 申请日期 2006.11.01
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHEN CHIA-YI;CHANG CHUNG-LONG;CHAO CHIH-PING
分类号 H01G4/06;H01G4/005 主分类号 H01G4/06
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