发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device such as an NAND type flash memory capable of suppressing drop of a withstand voltage while restraining the depth of an element separation region. SOLUTION: Gate electrodes PG are formed side by side by being separated from one another in the gate length direction through a gate insulation film 11 on active areas AA between element separation films adjacent to each other. A crystal silicon layer 14 constituting the gate electrode PG is provided with: a one end 14a projecting onto the upper surface of the element separation film located on one side of the active area AA; and the other end 14b projecting onto the upper surface of the element separation film located on the opposite side of the active area AA. The length L1 of the one end 14a and the length L2 of the other end 14b are different from each other. COPYRIGHT: (C)2010,JPO&INPIT
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申请公布号 |
JP2009253144(A) |
申请公布日期 |
2009.10.29 |
申请号 |
JP20080101379 |
申请日期 |
2008.04.09 |
申请人 |
TOSHIBA CORP;CHUBU TOSHIBA ENGINEERING KK;TOSHIBA MICROELECTRONICS CORP |
发明人 |
SUZUKI ATSUHIRO;SHIMOIDE KOJI;SHIMANE TAKESHI;ARAI NORIHISA;KAJIMOTO SANETOSHI |
分类号 |
H01L21/8247;H01L21/76;H01L27/10;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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