发明名称 FILTER CIRCUIT AND RECEIVING APPARATUS
摘要 PROBLEM TO BE SOLVED: To reduce DC offsets due to cutoff frequency switchings of filters. SOLUTION: A filter circuit (7) includes first capacitors (C1X, C1Y), second capacitors (C2X, C2Y) capable of altering cutoff frequencies by being connected in parallel to the first capacitors, first switches (SW1X, SW2X, SW1Y, SW2Y) for connecting the second capacitors in parallel to the first capacitors, and charging circuits for the second capacitors. The charging circuits include second switches (SW3X, SW3Y, SW4X, SW4Y), and resistors (R2X, R2Y) for attenuating the amplitudes of input voltages to be supplied to the second capacitors by being connected in series to the second capacitors. The second capacitors are charged through the resistors in a state where the first switches are in OFF states, and where the second switches are in ON states. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009253814(A) 申请公布日期 2009.10.29
申请号 JP20080101481 申请日期 2008.04.09
申请人 RENESAS TECHNOLOGY CORP 发明人 YAMADA MASAAKI;KATSUBE YUSAKU;TAKAHASHI JUNICHI;HABUKA TOSHITO;YAMAGUCHI NORITO
分类号 H04B1/30;H03H7/06;H03H7/12 主分类号 H04B1/30
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