发明名称 Method for forming a die-attach layer during semiconductor packaging processes
摘要 Disclosed is a method for forming a die-attach layer during semiconductor packaging processes. A chip carrier includes a substrate core and a stiffener. Top surface of the substrate core includes a plurality of die-attaching units and a peripheral area enclosed by the stiffener. A non-planar printing stencil is also provided. When the non-planar printing stencil is pressed against the chip carrier, the non-planar printing stencil is compliantly in contact with the substrate core and the stiffener and a plurality of printing openings of the non-planar printing stencil exposes the substrate core within the die-attaching units. During stencil printing, die-attach material fills in the printing openings to directly adhere to the substrate core. Therefore, the warpage of the substrate core is restrained to avoid bleeding of die-attach material so that die-attach materials can be formed as a die-attach layer with a uniform thickness on core-exposed chip carrier with lower costs. Additionally, the chip carrier will not be deformed during semiconductor packaging processes.
申请公布号 US7605018(B2) 申请公布日期 2009.10.20
申请号 US20080007008 申请日期 2008.01.04
申请人 POWERTECH TECHNOLOGY INC. 发明人 FAN WEN-JENG
分类号 H01L21/44 主分类号 H01L21/44
代理机构 代理人
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