发明名称 METHOD FOR FORMING DOPED POLYSILICON VIA CONNECTING POLYSILICON LAYERS
摘要 The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the present invention can be used, for example, to connect the channel layer of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells formed above the first device level. Similarly, vias according to the present invention can be used to connect the wordline of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells.
申请公布号 US2009258462(A1) 申请公布日期 2009.10.15
申请号 US20090489214 申请日期 2009.06.22
申请人 KONEVECKI MICHAEL W;RAGHURAM USHA;MAHAJANI MAITREYEE;NALLAMOTHU SUCHETA;WALKER ANDREW J;KUMAR TANMAY 发明人 KONEVECKI MICHAEL W.;RAGHURAM USHA;MAHAJANI MAITREYEE;NALLAMOTHU SUCHETA;WALKER ANDREW J.;KUMAR TANMAY
分类号 H01L21/82 主分类号 H01L21/82
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