发明名称 Method for fabricating an integrated gate dielectric layer for field effect transistors
摘要 Methods for forming a integrated gate dielectric layer on a substrate are provided. In one embodiment, the method includes forming a silicon oxide layer on a substrate, plasma treating the silicon oxide layer, depositing a silicon nitride layer on the silicon oxide layer by an ALD process, and thermal annealing the substrate. In another embodiment, the method includes precleaning a substrate, forming a silicon oxide layer on the substrate, plasma treating the silicon oxide layer, depositing a silicon nitride layer on the silicon oxide layer by an ALD process, and thermal annealing the substrate, wherein the formed silicon oxide layer and the silicon nitride layer has a total thickness less than 30 Å utilized as a gate dielectric layer in a gate structure.
申请公布号 US7601648(B2) 申请公布日期 2009.10.13
申请号 US20060496411 申请日期 2006.07.31
申请人 APPLIED MATERIALS, INC. 发明人 CHUA THAI CHENG;MUTHUKRISNAN SHANKAR;SWENBERG JOHANES;KHER SHREYAS;WANG CHIKUANG CHARLES;CONTI GIUSEPPINA;URITSKY YURI
分类号 H01L21/31 主分类号 H01L21/31
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